相对于传统二维的接脚型晶片封装技术，贯穿矽晶圆通路(Through Silicon Via-TSV)能够进行三维堆叠式封装方式，也就是将多个晶片朝上相互堆叠以形成降低空间阻碍之三维结构。
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The methods of 3d interconnection can be classified into the wire bonding, flip chip, through silicon via (TSV) and film wire technology, whose advantages and disadvantages are analyzed.
将实现3d互连的方法分为引线键合、倒装芯片、硅通孔、薄膜导线等，并对它们的优缺点进行了分析。
This article will review today's challenges, along with such future trends as integration and through-silicon via(TSV) technologies.
概述当今的挑战，以及这些集成和硅通孔技术的未来趋势。
A via hole is formed in the substrate within the spirally patterned conductor layer, the via hole being formed by through silicon via (TSV).
介层洞形成于螺旋图案化导体层内部的基材中，该介层洞通过硅通孔技术制成。
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