... High state logic level 高状态逻辑电平 Low state logic level 低状态逻辑电平 three-state logic 三态逻辑 ...
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... three state logic 三态逻辑 three-state logic 三态逻辑电路 three-state logic circuit 三态逻辑电路 ...
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以上来源于: WordNet
This paper discusses the connection of state delay and digital logic electron technology from three ways.
本文从三个方面论述延迟现象与数字电子技术的关系。
Through adding a zero-crossing comparator and optimizing the inverter switching logic, this method which is based on the traditional two-state hysteresis control can achieve three-state outputs.
该方法是在传统的两态滞环控制的基础上，增加过零比较器，通过优化逆变器的开关逻辑，从而实现滞环控制下并网逆变器的三态输出。
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