This paper presents an algorithm of test patterns generation for digital circuits which is called the principal path sensitization method.
本文提出了产生数字电路测试码的一种算法——主路径敏化法。
In order to reduce the storage requirements for the test patterns, a vertical and horizontal test data compression BIST scheme based on the test pattern generation of twisted-ring counter is proposed.
为了减少测试向量的存储需求，提出一种基于扭环计数器作为测试向量产生器的横向和竖向测试数据压缩的BIST方案。
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