switch-capacitance network 开关电容网络
Anew method, the admittance matrix analysis of the switch capacitance network, is proposed in this paper.
本文给出了开关电容网络的“导纳”矩阵分析法。
The ERCCL logic is not implemented through a switch logic network but through capacitance coupling, which reduces its turn-on resistance and adiabatic losses.
利用电容耦合，而不是开关逻辑网络进行逻辑求值，相对减小了导通电阻和绝热损失。
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