... 可测性设计及测试码自动生成 Design-For-Test (DFT) and Test Vector Generation 静态验证 Static Design Verification 系统级设计 System Level Design ...
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Static verification and design by contract relay on theorems that are mostly based on deterministic approach.
静态验证和契约式设计理论大部分属于确定性理论的范畴。
The kind of virtual simulation provides basis for the verification of dynamic and static interference, path planning, and the parametric design of the grinder.
文中的虚拟仿真与分析也为机床结构设计中的动静态干涉、轨迹规划的合理性及参数设计的合理性评价提供了依据。
Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.
最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。
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