Because the behaviors of digital system can be described by register transfer level (RTL) behavior exactly, RTL synthesis becomes the mainstream design method in EDA domain.

由于寄存器传输级(rtl)行为描述可以精确地确定数字系统的操作，所以寄存器传输级综合成为当前EDA行业的主流设计方法。

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As the behavior of digital system can be fully described by the register transfer level (RTL) behavior descriptor, so RTL synthesis has become the mainstream design method in EDA domain.

寄存器传输级(rtl)综合实现从rtl行为描述到门级结构描述的转换，是目前EDA设计行业的主流设计方法。

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Verification is the bottleneck of more and more complex integrated circuit designs, and doing verification directly on register transfer level (RTL) is a promising solution.

验证是当前越来越复杂的集成电路设计中的瓶颈，在寄存器传输级（RTL）直接做验证是目前比较有效的一种途径。

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