This paper discusses the foundation and the application of reduced-dimension Karnaugh map in numeral logical circuit design.
文章介绍了在数字逻辑电路设计中降维卡诺图的建立和应用。
The Reduced-Dimension Map can be used as a means to simplify the multiple variable logical function and to design logic circuit.
降维图可作为化简多变量逻辑函数、设计逻辑电路的一种方法。
When using MSI to implement logical functions, we can use Reduced-dimension Karnaugh Map (RDM) to simplify multi-variable functions.
在用中规模集成逻辑电路实现函数时，使用降维卡诺图可化简多变量函数。
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