This paper also analyzes the internal structure of the interface, and gives the design of PCI bus configuration and the realization of target state machine in the interface of PCI.
本文还分析了接口内部实现结构，给出了PCI总线配置空间的设计以及目标状态机的实现。
The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.
根据PCI总线操作时序，提出了从设备接口控制器的有限状态机模型。
PCI target interface controller design with FPGA is proposed. And the realization of the complication of the access sequence to the BUS interface controller is expressed by sequence state machine.
给出了一种基于FPGA实现PCI总线目标模块接口控制器的设计方案，用时序状态机来实现总线访问操作复杂的时序。
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