或者，在将来一些硬件或许会使用门数(gate count)来优化m4x4。所以，如果你需要，例如在你的vertex shader汇编代码中有4个dp4的调用，最好用m4x4来替换他们。
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以上来源于: WordNet
The gate count of a system based on ERCCL can be significantly reduced, which, in turn, will decrease the energy loss.
所以一个基于ERCCL的系统可以大大减少逻辑门数，从而降低系统能耗。
As the average gate count for designs now approaches or exceed on million, the verification has become the main bottleneck in design process.
随着设计规模的不断增加，芯片的平均设计门数已经超越百万级，验证已经成为设计流程中的主要瓶颈。
Adding parallelism typically increases gate count, but the improved computational efficiency allows for the lower clock frequency needed to meet real-time constraints.
添加并行一般通过门数增加来实现，但提高计算效率要求降低时钟频率以满足实时需求。
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