The Titanium silicide film has its potential advantage in forming a gate electrode and interconnection for VLSI because of its low resistivity and some other good characteristics.
硅化钛薄膜由于电阻率低和其它一些良好特性，在VLSI的栅电极和互连线中显示出它潜在的优势。
In this paper, concept of staggered generating ratio has been put forward, the forming process has been analysed, the calculate equation of the electrode dimension has been given.
文中提出了交错展成比的概念，分析了成形过程，给出了电极尺寸计算公式。
The base electrode (3) is a metal layer deposited on top of the semiconducting material forming the first electrode.
基极电极(3)是沉积在形成第一电极的半导体材料上面的金属层。
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