Floating-point Fused Multiply-add 浮点乘加器
floating-point multiply-add 浮点乘加部件设计优化
The floating point multiply-add fused operations flow 9 pipeline stage and floating point add operations flow 6 pipeline stage. The synthesis result shows that the design can work at above 500MHZ, satisfying therequirements of X microprocessor.
本文对所设计的双精度乘加部件进行了综合和优化,在浮点乘加和并行整数乘法分成9个流水站,浮点加法分成6个流水站的情况下,综合结果表明其频率能达到500MHZ以上,满足X处理器设计的要求。
参考来源 - 支持并行整数乘的双通路浮点融合乘加结构的研究与实现·2,447,543篇论文数据，部分数据来源于NoteExpress
In Listing 2, I reopen the Numeric class (which handles both fixed and floating-point Numbers) to add the gram and pound methods.
在清单2中，我重新打开了numeric类(其处理固定和浮点数字)以便添加gram和pound方法。
Compared with the floating-point computing method, the shift-add operation is simpler, and can be implemented easily by VLSI, which enables the real-time image processing to be realized by hardware.
相对于浮点计算法，移位-加操作最大的优点是计算简单，特别易于超大规模集成电路实现，因而使硬件实时处理图像信号成为可能。
Based on the idea of multi-path, this thesis proposes an improved multi-path floating-point fused multiply-add (MAF).
基于多通路的思想，文章提出了一种改进的多通道浮点乘加器结构。
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