The process is compatible to the existing double poly-silicon self-aligned NPN transistor process, which can be used to fabricate high-performance complementary bipolar circuits.
该工艺与已有的双层多晶硅自对准NPN晶体管工艺相兼容，可用于制造高性能的互补双极电路。
This detector line array is fabricated using 2 micron design rule and a double level poly silicon structure.
器件采用最小2微米设计规则，两层多晶硅结构。
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