The Digital Phase Lock Loop(DPLL)is the core of the coherent demodulation.

数字锁相环路（DPLL）是数字相干解调技术的核心。

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In the demodulation process of some digital open-loop algorithms, some special phase points will confuse with each other and cause an error output value.

目前已经提出的一些数字开环解调算法在运算过程中时常会出现某些特殊相位点互相混淆的问题，这会导致系统输出错误的解调结果。

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Realize digital orthogonal demodulation; the method and results of amplitude consistence and phase orthogonality of the I, Q signal have been given;

给出数字正交解调后输出I、Q两路信号的幅度一致性误差和相位正交性误差的测试方法和测试结果；

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