Under pressure of the increase of chip scale and the decrease of timing to market, verification has become the bottleneck of digital IC design.
在芯片规模指数式上升和要求面市时间快速缩短的双重压力下，验证已成为数字集成电路设计的瓶颈。
Chip verification, especially functional verification has become one of the most difficult and challenging issues in IC design.
芯片验证，尤其是功能验证已成为当前集成电路设计中最困难、最具挑战的课题之一。
In integrated circuit (IC) chips design, the verification is one of the most complex and time-consuming step in the chips design flow.
在集成电路(IC)芯片设计中，验证是芯片设计流程中最复杂、最耗时的环节之一。
应用推荐