delta a sigma modulator 增量累加调制器
This invention discloses a Delta-Sigma Digital to Analog Converter (DAC), comprising a Delta-Sigma modulator and a Finite Impulse Response (FIR) filter.
本发明揭露一种三角积分数模转换器，其包含三角积分调制器以及有限脉 冲响应滤波器。
The Delta-Sigma modulator receives an over-sampled digital signal and generates a shaped digital signal.
三角积分调制器接收过采样数字信号并产生整形数字信号。
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