...科技_论文宝库 中文关键词： DDR3 SDRAM,物理层,延迟锁相环,压控延迟线,鉴相器 中文摘要： 延迟锁相环(Delay-Locked Loop,DLL)因具备时钟定位准确、抗抖动能力强、锁定速度快等优点,在各种时序系统中得到了广泛应用。
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Delay Locked Loop 延迟锁相环 ; 延迟锁定环 ; 延迟锁定环路
DLL Delay-Locked Loop 延时锁定循环电路
delay locked loop dll 延迟锁定环路
delay-locked loop dll 延迟锁相环
digital delay-locked loop 数字延迟锁相环
coherent delay-locked loop 相干延迟锁定环
multipath estimation delay locked loop 多径估计延迟锁相环
delay phase locked loop 延迟锁相环
·2,447,543篇论文数据，部分数据来源于NoteExpress
以上来源于: WordNet
Theoretical and numerical results show that the new scheme has an improved performance and remarkable complexity simplicity as compared with the classical digital delay-locked loop.
理论分析和数值结果表明，该方案较传统的延迟锁定跟踪方案明显降低了实现复杂度，而且性能有所提高。
To this end the current multipath estimation delay locked loop(MEDLL) was investigated and improvements were proposed based on the zero-point fixed principle.
为了消除扩频系统中的多径干扰，文章基于稳态零点不变的原则对多径估计延迟锁相环（MEDLL）进行研究及改进。
In this paper, a low-jitter process-independent DLL(delay locked loop) based on self-biased techniques is presented.
本文给出了一种采用自偏置技术的低抖动延迟锁相环，可应用于高频时钟产生电路。
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