基于ADSP-TS201S的多DSP并行系统设计 关键词:多DSP并行系统; ADSP-TS201S; FPGA; CPCI接口 [gap=958]Keywords: multi-DSP parallel system; ADSP-TS201S; FPGA; CPCI interface
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The hardware design of the module mainly presents analogue channel circuit design, A/D acquisition circuit design, digital control circuit design, power and CPCI interface design.
主要介绍CPCI 数字存储示波器模块的模拟通道设计、A/D采样设计、数字控制电路设计、电源设计以及CPCI 接口设计。
Thus, the interface design of multi-DSP and CPCI bus with FPGA and bridge chip PCI9656 is described in detail.
本文详细介绍如何通过FPGA和桥接芯片pci9656实现多dsp与CPCI总线的接口设计。
CPCI bus Interface Standard: CPCI bus is a high performance industrial bus acceptable for 3u and 6u board design based on the PCI bus specification.
CPCI总线接口标准的研究：CPCI总线是以pci总线规范为基础的高性能工业总线，适用于3u和6u插板的设计。
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