sequence-control design 顺序控制设计法
We put emphasis upon systemic hardware design, discuss the sequence control of CPLD, Register control of image sensor, and hardware exploiture, software realization, empirical analysis of DSPs, etc.
并着重研究了系统的硬件设计，讨论了CPLD的时序控制、图像传感器的寄存器控制以及DSP芯片的硬件开发、软件实现、实验分析等等。
FPGA is used to achieve the complex and high-speed logic control and the design of time sequence, with grabbed digital video signal cut and stored in SRAM, under the principles of the video signal.
利用FPGA完成复杂且高速的逻辑控制及时序设计，将采集的图像根据视频信号原理进行裁剪并存储在SRAM中。
An improvement of logic design approach for time-sequence control circuit is presented.
本文提出了逻辑法设计时序控制电路的改进方法。
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