在PIC12C5XX芯片内有一个特殊的谓之“系统定义字”（Configuration EPROM）的单元，其中的一个位是用于定义WDT的，可以将其置“0”来抑制WDT使之永远不起作用。这将在第六章的烧写器介绍部分详细说明。
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The passive serial configuration of FPGA is controlled by CPLD. EPROM is selected to store the configuration program. It can improve encryption of the CNC system, and simplify the circuit.
该方法由CPLD控制配置过程，EPROM存储配置文件，实现了FPGA的被动串行配置，增强了数控系统的保密性、简化了系统电路。
A microcontroller requests a flexible configuration of FPGA in some special project applications, usually it cannot be satisfied by routine EPROM configuration.
微控制器在某些工程应用中经常需要对FPGA进行灵活的配置，采用常规的EPROM配置FPGA很难满足这一要求。
EPROM (Erasable programming Read Only Memory) programming device is depicted; its system configuration, operation principle, software design and some flow charts are stated accordingly.
设种通eprom(擦编程序读存储器)程器，阐述该编程器系统、软件设，程序设流程图。
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