bus-timing emulation 总线时序仿真
memory input bus timing generator 存储时标发生器
Timing Bus 定时总线 ; 时钟总线
timing signal bus out 定时信号输出总线
TSBO Timing Signal Bus Out 定时信号输出总线
bus interface timing 总线接口时序
The FPGA logic also accomplished functions for test system integration, whitch are specified by VXI standard, such as bus requester, bus arbitration bus timing and various triggers etc.
同时在FPGA内部实现VXI总线规范的各项功能,包括总线请求、总线仲裁、总线定时器和多种触发等。
参考来源 - 高性能VXI嵌入式计算机研制·2,447,543篇论文数据，部分数据来源于NoteExpress
In this paper, an ASIC based on PCI Local Bus SpecificationV2.2 is designed, and its function, timing characteristic and design flow are also presented.
研究并设计了符合PCI规范V2.2的接口芯片，着重阐述了它的功能特点、时序特征及其大致设计流程。
The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.
根据PCI总线操作时序，提出了从设备接口控制器的有限状态机模型。
Programmable hardware timing was used in design of microsecond synchronizer based on ISA bus, after pulse generated by oscillator was divided frequency, it was sent to 8254 to count.
基于IS A总线的微秒级同步器采用可编程硬件定时，由晶振发出脉冲经分频后送入8254计数。
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