bit synchronous 位同步
bit synchronous clock signal 位同步时钟信号
bit-synchronous signal 位同步信号
bit synchronous extracting 位同步提取
bit synchronous signal recovery 位同步信号恢复
Synchronous digital hierarchy bit rates 同步数字体系的比特率
synchronous bit oriented full duplex 同步位导向全双工
eight-bit binary reversible synchronous counter 八位二进制可逆同步计数器
This paper discusses extraction of the bit-synchronous signal with a first-order ADPLL mainly.
本文主要以一阶环为例讨论位同步信号提取。
Compared with conventional circuits, the recovered parallel data is bit-synchronous, and the reference clock is avoided.
与传统并行数据恢复电路相比,该电路不需要本地参考时钟,并且恢复出的并行数据是位同步的。
The digital realization of monostable circuit and extraction of bit-synchronous signal with digital phase lock loop are also introduced in detail.
对于其中的单稳态电路的数字化和数字锁相环提取位同步信号也进行了详细的设计说明。
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