The latest Cisco Cloud Scale ASIC technology enables cost effective 36 port 100 GbE in a single chip design.

最新的思科云规模的ASIC技术实现成本效益的36端口100千兆以太网在一个单一的芯片设计。

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If you use the CPLD method of configuring the FPGA, you can store both the FPGA bitstream and the required code in a single NOR flash chip; it's probably the simplest system design.

如果使用CPLD方法配置FPGA，则可在一个NOR闪存芯片中存储fpga比特流和所需的代码；这可能是最简单的系统设计。

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Mariantoni says that using superconducting circuits allowed the team to place the qubits and memory elements close together on a single chip, which made possible the new von Neumann-inspired design.

Mariantoni说利用超导电路的方案允许他们将量子比特和存储单元紧靠的放置在单个芯片上，这提供了制造新的冯诺依曼设计的可能。

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Mr Joy says that his new design, which turns a single chip into a parallel-processing system, can handle huge amounts of video and audio data at speeds that would overwhelm the usual Intel chip.

ECONOMIST: Strength through Joy | The

The design, which combines a CPU and modem on a single chip, is more affordable, efficient and compact than systems that use two chips, said Lin.

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