第二章论述了现今高速互连设计使用到的分析方法，包括电路方程的表述和模型简化算法。
In Chapter 2, the analysis methods concerned with high speed interconnect design are discussed, including the formulation of circuit equations and model reduction algorithm.
高速低功耗VLSI结构的设计实现以及片内高性能互连线的分析设计是VLSI设计的两个关键领域。
The design and implementation of high speed low power VLSI structure and the analysis and design of high performance on-chip interconnect are two key fields of VLSI design.
本文介绍了高速并行总线互连设计中出现的信号完整性问题及新的设计方法学。
This paper introduces the problems of Signal Integrity in high-speed parallel bus interconnect design and the new design methodology.
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