采用模块化设计方法对CPLD进行设计，并给出了硬件描述语言的具体结构。
With blocking means in CPLD design, the structure of HDL (hardware describe language) program is also given.
采用VHDL硬件描述语言设计一种再生视频复合消隐信号的专用芯片。
In this paper, a kind of chip of video complex black signal is described with VHDL.
CPU内核采用VHDL硬件描述语言输入，结合流行的EDA设计、综合、仿真工具，最后在FPGA上实现该内核。
The reference CPU core use VHDL language input, make logic synthesis and simulation through the popular EDA tools, then it was implemented in FPGA.
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