为了降低开发超大规模集成电路器件的测试程序的费用，缩短开发周期，给出了一种设计和开发测试系统仿真器的基本思想、结构组成及其功能。

In order to reduce the cost of developing VLSI test program and shorten developing cycle, an idea of a simulator design of test system and gives the simulators structure and function is put up.

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本文主要是对大规模、超大规模集成电路寄存器传输级（RTL）的自动测试产生算法进行研究。

This dissertation focuses on automatic test generation (ATPG) algorithms for very large-scale integrated circuits at register-transfer-level (RTL).

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