JW认为下一个十年将会兴起的另一个架构是，连接企业资源到云的网络是一个单芯片上的总线。
Another architecture, that JW sees coming in the next 10 years is the one where "the network connecting enterprise resources to the cloud is a bus on a single chip."
增强的总写架构-目前64位芯片上的总线架构比前几代更加的快也更加的广。
Enhanced bus architecture - The bus architecture on current 64-bit chipsets is faster and wider than earlier generations.
本论文的主要工作即着重于系统芯片中片上总线结构的性能评价研究，包括总线结构的建模、系统仿真环境的建立以及性能评价的方法。
This paper focuses on performance estimation of the embedded microprocessor based on the on-chip bus, including on-chip bus modeling, high-level simulation environment building and their combination.
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