基于FPGA和电子设计自动化技术。采用模块化设计的方法和VHDL语言，设计一个基于FPGA的RISC微处理器。
RISC microprocessor is developed by using modular design method and VHDL language based on FPGA and EDA technology.
应用APDL参数化设计语言对CAE优化设计的前后置处理进行编程处理，生成分析命令批处理脚本文件，进而实现求解过程的自动化。
The APDL language was used to program the Preprocessor and Postprocessor of CAE optimal Design. The command batch files were built to implement automatic computation and analysis.
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