本文试图把时序逻辑电路和组合逻辑电路的设计，在概念上和方法上统一起来。
In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据设计要求，通过本程序的运行，可获得最佳的组合逻辑电路的参数。
According to a requirement of design, the optimum parameters of combinational logic circuits can be obtained after running the program.
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