此门阵列采用的BFL预功能级标准逻辑单元，具有九种组合逻辑功能及两种不同选择的驱动能力，并具有输出电平调节功能。
The pre-functional cell of standard buffered FET logic (BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability.
这种电路充分利用与电路、或电路、异或电路的功能，把一个较为复杂的判断电路，变成简单的逻辑组合电路。
The circuit makes full ues of functions of and circuit, or circuit and exclusive or circuit, which turns the more complex judging circuit into simple combinatory logic circuit.
逻辑综合的功能是对组合逻辑函数的描述进行转换和优化，生成与逻辑功能描述等价的优化的逻辑级纯结构描述。
Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description.
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