该硬件原型包含了从残差形成到宏块重建的变换量化全过程，其可以构成DSP的协处理器，用于完成H。 264实时编解码。
The hardware prototype is composed of the whole processes from obtaining residual error to Macro-Block reconstruction, and it can be used as a co-processor of DSP to fulfill H. 264 real-timing CODEC.
介绍了语音编解码算法原理、声码器系统的硬件结构、工作流程以及软件实现与代码优化。
The speech coding algorithm, the hardware architecture and work flow of the vocoder system, software implementation and code optimization are introduced.
在各种语音编解码改进算法的实现过程中，我们采用了TI公司的TMS320C 5402 DS K板为硬件平台及CCS集成开发环境。
In the realization of these kinds of mended arithmetics, the TMS320C5402 DSK of ti company is adopted as the hardware flat roof and the CCS integrated exploiture environment.
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