解决了CCD的时序电路及功率驱动电路设计问题。
The paper designs the circuits of working clock and power driver for CCD.
在软件设计中，主要完成了FPGA的驱动时序设计和ARM的主控程序设计。
In software designing, the main driver to complete the FPGA design and ARM timing master programming.
软件部分介绍了系统的PCI驱动程序开发方式，时序逻辑的实现，还有系统的被动显示界面、主动FM、CW、全景、扇面显示界面的设计。
The software part is consist of opening out PCI driver program, scheduling logic, the display interface of passive mode and the FM, CW, all-scene, fan-scene of active mode.
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