在电路设计过程中，对后级接口电路进行了最优化设计，采用VHDL描述的方式实现了低压数字延时电路模块的设计。

In this paper, the optimization method was used to design the interface circuit, and use VHDL description to design low voltage digital delay timer.

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提出了有源钳位准谐振变换器的一种新的驱动方式，它无需经过数字电路延时，只需一个电阻和二极管构成的小网络。

This paper proposes a new gate drive method for active clamped quasi resonant converters. Instead of a digital delay circuit, only a resistor and a diode are added to produce correct drive waveforms.

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采用模拟回波和精密延时电路检测照射能力、用CCD采集激光光斑测试激光束散角，实现了整机性能的数字化检测。

Using simulation echo wave and accurate time delay circuit to measure ranging ability, using CCD to grasp laser facular to measure divergence of laser pulse, the digitized methods are realized.

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