...使用VHDL描述组合逻辑电路时,根据描述风格的 不同,我们将它分为行为级描述、结构流Data Flow 描述和结构级(Structural Level)描述。
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这种简单的分类形成了第一级结构,可以使用它理解和描述现有的内容。
This simple categorization gives the first level of structure that you can use to understand and describe what you have. Still, some required functions are missing from this diagram.
同时,设计了通信层、接口层、模型层、特征描述层和路由描述层的体系结构,解决了特征级感知和感知通信的问题。
A system structure was designed as five tiers of communication tier, interface tier, model tier, feature description tier, and router description tier.
逻辑综合的功能是对组合逻辑函数的描述进行转换和优化,生成与逻辑功能描述等价的优化的逻辑级纯结构描述。
Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description.
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