CBUS/DBUS Control Bus /Data Bus 控制总线/数据总线 CBUS-CLK Control Bus Clock 控制总线时钟 CBUSCLK Control Bus Clock UEM控制总线时钟信号 ..
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主机对总线有最高的控制权，在任何时候通过将时钟线拉低就可以禁止通信。
The host has ultimate control over the bus and may inhibit communication at any time by pulling the Clock line low.
一旦选择了时钟源，可以有多种控制最终总线频率的选择。
Once you select the timing source, you have many options for controlling the final bus frequency.
首先针对网络控制系统分布式的特点，特别是类似于CAN总线的多主系统，由于没有单一的时钟提供同步机制，影响调度管理的同步。
First, aiming at the distribution of NCS, specially the multi-master system such as CAN, there is no unified network clock, so the scheduling and management are affected.
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