它的第一个设计非常简单，所有指令都在一个时钟周期内完成。

Its first design was very simple and all instructions were completed in one clock cycle.

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当它运行时，它会记录每次系统时钟中断发生时正在执行的指令的地址。

While it is running, it records the address of the instruction that is being executed every time a system-clock interrupt occurs.

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POWER 5微处理器使此吞吐量增加了一倍，每个时钟周期收集两组指令(每组最多有五个)，并在每个时钟周期内完成两组指令。

The POWER5 microprocessor doubles that throughput by collecting two groups of up to five instructions per clock cycle and completing two groups per clock cycle.

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