八路三态反相总线收发器。高性能硅栅cmos。
Octal 3-state inverting bus transceiver. High-performance silicon-gate CMOS.
八路三态同相总线收发器。高性能硅栅cmos。
Octal 3-state noninverting bus transceiver. High-performance silicon-gate CMOS.
采用新型的GTL总线收发器、时钟相位调节和组合式匹配等技术措施，解决了总线设计的驱动、时序和信号完整性问题。
The problems of backplane bus design, such as the driver, timing and signal integrate, have solved by using the GTL transceivers, phase adjustment of the clock and combined match techniques.
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