MC68332单片机结构与应用/张宁/赵泽良/北京... ... 15?总线控制信号(bus?control?signals) 16?总线仲裁信号(bus?arbitration?signals) 17?中断请求优先级(interrupt?request?level)irq7～irq1 ...
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PC与DSP的数据交换采用高速静态RAM，并设计总线仲裁电路及相应的握手信号，以保证PC与DSP双方对RAM的正确读写。
PC and DSP exchange data using high speed static RAM and bus arbitration circuit and corresponding handshake signal is designed to ensure the correct reading and writing RAM.
当仲裁器发现有总线请求进入时，就在总线应答线上发送应答信号。
When the arbiter sees a bus request come in, it sends its reply on the bus grant line.
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