... switch resistance motor 开关磁阻电机 Switch-on Resistance 开关导通电阻 switch resistance check 开关电阻检查 ...
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利用电容耦合，而不是开关逻辑网络进行逻辑求值，相对减小了导通电阻和绝热损失。
The ERCCL logic is not implemented through a switch logic network but through capacitance coupling, which reduces its turn-on resistance and adiabatic losses.
它是特别设计，在电压下降到0 V时整个开关元件，同时保持良好的速度和导通电阻特性。
It is specifically designed to operate at voltages down to 0v across the switch elements while maintaining good speed and on-resistance characteristics.
该技术通过消除采样开关有限导通电阻的影响，补偿了采样带宽，并避免了时钟馈通和电荷注入的加剧。
The CEC technique compensates the sampling bandwidth by eliminating the impact from finite on-resistance of the sampling switch, and avoids increasing clock feedthrough and charge injection.
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