论文的最后设计了EPP模式的并行通信接口，实现了pc机与FPGA之间数据加密系统的调试验证。
Finally, the parallel interface in EPP mode is designed and the whole data encryption system designing between FPGA and PC is given to carry out the verification of data encryption results.
在要求传输距离近，通信速度快的数据采集应用中，如CCD、视频数据采集，往往采用并行接口方式。
Parallel interface is usually adopted in the applications of data acquisition that need close -range data transfer and fast communication, such as CCD and video data acquisition.
电路采用可变结构帧存形式，与两片TMS320C40 灵活的外部接口及强大的通信能力相结合，使系统可方便地组织成SIMD、MIMD等并行处理结构及流水处理结构；
This, combined with the flexible interface and powerful communication capability of TMS320C40 , made the system be easily configured as SIMD, MIMD parallel and pipeline structures.
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