本文分析了常用对称密码算法DES、3des和AES的可重构性，利用流水线、并行处理和可重构技术，提出了一种可重构体系结构。
In this paper, based on the analysis about the reconfiguration of the DES, 3des and AES, we propose a reconfigurable architecture, which combines reconfiguration technology with pipeline, par.
软件流水和循环展开是开发循环并行性的两种重要编译优化技术。
Software pipelining and loop unroll are two kinds of important optimized compile technique to develop loop parallelism.
本文的设计着重从多个层次利用并行处理技术来提高环路滤波的速度，包括流水线设计、数据流驱动控制策略以及算法并行性设计。
Our design emphasizes on using parallel processing technology from multi-level to improve speed, including pipelining design, data-flow drive strategy and algorithmic parallelism design.
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