采用现场可编程门阵列（FPGA）基于小数分频器的原理，实现直接数字式频率合成器（DDS）。
The realization of direct digital synthesizer (DDS) by FPGA based on the principle of fraction division is introduced.
该合成器采用程控时分复用小数分频锁相技术，解决了快速跳频频率合成中的诸多固难。
Some technique problems in fast frequency hopping synthesis are solved by making use of a programmable time division-fractional division PLL.
文中介绍了一种小数分频频率合成器的设计方案。
In this paper, a solution to fractional frequency dividing frequency synthesizer is introduced.
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