采用现场可编程门阵列（FPGA）完成测试图案数据存储、各种视频标准时序产生及系统控制信号产生等核心功能。
The kernel functions such as test signal storage, video timing signal generation and systems control signal generation are realized by field programmable gate array(FPGA).
第一存储器(102)被配置用于存储用于视频测试图案的各部分之间的过渡的像素值，并被配置用于存储重复的像素值。
A first memory (102) is configured to store pixel values for transitions between portions of the video test pattern and configured to store a repeated pixel value.
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