介绍了基于FPGA芯片的星载合成孔径雷达实时成像处理器中方位压缩处理器的设计与实现。
The design and the implementation of the azimuth compressor based on FPGAs for space-borne SAR are introduced.
本文首先简单介绍了合成孔径雷达（SAR）成像原理，并对以超高速数字信号处理器（DS）为核心的机载合成孔径雷达实时成像处理系统的硬件结构作了描述。
This paper presents the principle of Sythetic Aperture Radar(SAR) imaging and describes the system hardware of airborneSAR real-time digital signal processing system with ultra-high speed DSP .
该文讨论了在合成孔径雷达实时成像处理器中，采用子孔径带通滤波成像处理方法的方位预处理的设计，构造了一种用大规模可编程逻辑器件实现方位预处理的电路结构。
This paper describes the design and realization of the azimuth preprocess in the real-time imaging processor of SAR with programmable logic device by the method of sub-aperture using band-pass filter.
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