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变频调速系统主电路采用交-直-交形式,以可编程逻辑器件(CPLD)作为调速系统逆变电路功率开关器件IGBT的逻辑控制器件。
Alternating-direct-alternating circuit is adopted and CPLD is used as logic control device of power IGBT in main circuit of variance-frequency timing system.
本系统采用了以DSP、MCU(微控制器)、CPLD(复杂可编程逻辑器件)为核心的系统硬件结构以及数字视频技术。
The system uses DSP, MCU (Microcontrol Unit) and CPLD (Complex Programable Logic Device) as the core of the system hardware and uses digital video technology.
根据单元级联多电平变换器拓扑结构及其脉宽调制技术的特点,以数字信号处理器和复杂可编程逻辑器件为核心,设计了多电平变换器的控制器。
On the basis of topology of cascaded multilevel convertor and its PWM technique, designed the controller of multilevel convertor at the core of DSP and CPLD.
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