只有在通用锁上执行同步或访问一个通用的可变变量时，才能创建跨线程的Happens - before排序。
Happens-before orderings across threads are only created by synchronizing on a common lock or accessing a common volatile variable.
HDL是设计数字逻辑电路必不可少的通用工具，该文给出了位同步性能较好的积分型自同步的一个HDL实现。
HDL is an essential general tool in digital logical circuit design. A HDL implementation of the integral bit synchronization with good performance is provided.
同步是扩频通信的关键技术之一，本文针对直扩系统，给出了一个利用通用仿真软件包对其进行仿真的方案。
Synchronization is one of the key techniques in spread spectrum communication systems. The paper proposes a synchronization scheme suited for common simulation software.
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