在复分接系统中,如同步数字系列(SDH),定时处理占有重要地位。
In multiplex and demultiplex systems such as Synchronous Digital Hierarchy (SDH), timing processing is very important to system performance.
基于七号信令的上述优点,用户提出采用此信令实现综合复分接设备接入公众电话网等支持七号信令的网络。
Based on these excellences, user bring out network supporting Signaling System 7, achieving integrated multiplex equipment connecting PSTN and so on.
本文提出了基于FPGA技术实现数字复接系统的设计方案,并介绍了基群与二次群之间的复接与分接的系统总体设计。
This paper puts forward a design method of digital multiplex system with FPGA, and introduces the whole system of multiplexing and demultiplexing between primary group and secondary group.
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