Important circuits in this system are track and hold circuits, two quantizers and digital calibration circuit.
系统中重点设计的模块包括：采样保持电路、两级量化器和数字校正电路。
参考来源 - 基于数字校正技术的二步流水线式A/D转换器的研究与设计The clock frequency could be trimmed by a set of digital calibration registers based on this algorithm. With this method, the calibration accuracy is±0.25 ppm, and the range of calibration is±32 ppm.
该算法可通过一组数字校准寄存器校准分频后的时钟频率,在不改变晶体振荡器的情况下可调节分频后的时钟频率,校准精度达±0.25 ppm,校准范围±32 ppm,间接对时钟进行校准。
参考来源 - 可校准实时时钟芯片的研究和设计·2,447,543篇论文数据，部分数据来源于NoteExpress
Completion of the direct use of digital calibration Settings.
直接用数字设置完成标定。
A method of digital calibration in the amplitude and phase imbalances of sum and difference channels, and of angle error normalization processing is provided.
并提供了一种和差支路幅相不平衡数字校正和角误差归一化处理的方法。
The whole circuit consists of Sample and Hold Circuit, the Multiplicative A/D Converter, the Sub-ADC, the Digital Calibration Circuit, the Clock Generator and the Time Synchronizer.
流水线ADC的模块有采样保持电路、乘法数模转换器、子ADC、数字校正电路、时钟产生电路和时间对齐电路。
应用推荐