A VLSI implementation of AES algorithm against both differential power attack and differential fault attack was proposed. The main countermeasures employed in this hardware design are masking technique and two-dimensional parity-based concurrent error detection method.
提出了一种抗差分功耗分析和差分故障分析的AES算法硬件设计与实现方案,该设计主要采用了数据屏蔽和二维奇偶校验方法相结合的防御措施。
参考来源 - 抗差分功耗分析和差分故障分析的AES算法VLSI设计与实现·2,447,543篇论文数据，部分数据来源于NoteExpress
A differential fault analysis of IDEA based on temporary and random bit faults is studied.
文中研究对IDEA的一个差分错误分析方法。
An efficient attack method against AES is presented with a detail example, which is called Differential Fault Analysis.
介绍了目前针对AES的有效的一种攻击方法：差分容错攻击，并给出了完整的攻击实例来加以说明。
A two-dimensional parity-based concurrent error detection method for AES algorithm against differential fault attack is proposed.
提出了一种AES算法的抗差分差错分析的并发错误检测方法——二维奇偶校验方法。
应用推荐