This paper presents the design and implementation of a zero-voltage-transition power factor correction (PFC) converter having high power factor, high efficiency, and low harmonic line current.
本文研制一个具有高功率因数、高效率、低谐波且可操作于高频之零电压切换升压型功因修正器。
Based on a method of 2 dimension data rearrange, a high speed and high efficiency implementation of DRAM access is proposed in the design of block buffer manager.
在数据块缓冲管理器的设计中，采用一种基于二维数据重排的访问方式，实现高速高效的DRAM访问。
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