design for testability 可测试性程式
DFT Design For Testability 有利于测试的设计
DFT-Design for Testability 可测性设计
design for testability dft 可测性设计
optimal design for testability 测试性优化设计
software design for testability 软件测试性设计
design-for-testability technique 可测试性设计技术
non scan design for testability 非扫描可测性设计
non-scan design for testability 非扫描可测性设计
The following content is to research how to realize OR1200 chip’s design for testability based on analysis some DFT technology’s characteristic and OR 1200 chip’s circuit structure.
接下来结合OR1200芯片的具体电路结构，分析各种可测性设计方法的优缺点，着重研究了实现OR1200芯片可测性设计的方案。
参考来源 - 芯片设计中的可测试性设计技术The BIST(Build-In-Self-Test) for software is a new concept in software testing and design for testability,which comes from the BIST for hardware testing.
软件内建自测试是软件测试和可测性设计研究领域中的一个新概念，其思想来源于硬件内建自测试BIST(BuildinSelfTest)。
参考来源 - 期刊学术社区·2,447,543篇论文数据，部分数据来源于NoteExpress
In this paper, a VLSI implementation method of design-for-testability for DCT is presented.
本文提出了一种离散余弦变换电路VLSI实现的可测试性设计。
First of all, several methods about testing technology and design for testability and SoC test techniques are summarized.
首先对测试技术和可测试性设计的一些方法做出了综述。
An optimal sequencing of the storage elements in the single scan chain design for - testability is presented in the paper.
本文提出了扫描设计中存储元件在扫描链中的最优排序方法。
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